DocumentCode
2901924
Title
Simulation considerations for analog-digital ASICs
Author
Fasang, Patrick P.
Author_Institution
Nat. Semicond. Corp., Santa Clara, CA, USA
fYear
1990
fDate
17-21 Sep 1990
Abstract
Problems and issues in the area of design for testability and how to map the outputs from simulation to a tester are presented. These problems and issues are encountered by mixed-signal analog-digital ASIC designers today. Solutions learned from past experience are given. Proper considerations given to the design for testability aspect and the simulation aspect will allow a mixed-signal design to flow smoothly, without delay from design to silicon delivery. Without proper considerations, a design may be delayed significantly due to testability problems or not knowing what to do with some of the simulation input or output stimuli
Keywords
application specific integrated circuits; circuit CAD; circuit analysis computing; circuit layout CAD; integrated circuit testing; design for testability; mixed-mode ASICs; mixed-signal analog-digital ASIC; mixed-signal design; Analog circuits; Analog-digital conversion; Application specific integrated circuits; Circuit simulation; Circuit testing; Context modeling; Digital circuits; Digital simulation; Logic devices; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/ASIC.1990.186143
Filename
186143
Link To Document