DocumentCode
2902499
Title
Hardware emulation of VLSI designs
Author
Horvath, Thomas A. ; Kreitzer, Norman H.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
1990
fDate
17-21 Sep 1990
Abstract
A commercially available hardware emulation system and its expected capabilities are described, and results of an evaluation using an existing VLSI chip are reviewed. Based on this experience, the potential of the emulation system in ASIC design is assessed and areas of improvement are suggested. A forecast is also given of possible evolution of hardware emulation
Keywords
VLSI; application specific integrated circuits; circuit CAD; circuit analysis computing; logic CAD; ASIC design; VLSI designs; hardware emulation system; Application specific integrated circuits; Chip scale packaging; Delay; Emulation; Hardware; Signal design; Technological innovation; Timing; Trademarks; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/ASIC.1990.186182
Filename
186182
Link To Document