DocumentCode
2902544
Title
QRS/BIST: a reliable heart rate monitor ASIC
Author
Roy, S.C. ; Nagle, H.T. ; McNamer, M.G. ; Krakow, W.T.
Author_Institution
Microelectron. Center, North Carolina, Research Triangle Park, NC, USA
fYear
1990
fDate
17-21 Sep 1990
Abstract
The design of a real-time heart rate monitor implemented as a single application-specific integrated circuit (ASIC) is presented. The goal of the project was to implement a QRS detection algorithm into a single-chip environment. The testability strategies used to increase device reliability, including the implementation of built-in-self test (BIST) features, are described
Keywords
application specific integrated circuits; biomedical electronics; built-in self test; cardiology; patient monitoring; BIST; QRS detection algorithm; application-specific integrated circuit; built-in-self test; device reliability; heart rate monitor ASIC; single-chip environment; testability strategies; Application specific integrated circuits; Automatic testing; Built-in self-test; Cardiac disease; Circuit testing; Electrocardiography; Heart rate; Heart rate measurement; Instruments; Muscles;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/ASIC.1990.186186
Filename
186186
Link To Document