Title :
A cost effective way to test embedded RAM and ROM
Author :
Wauwe, G. Van ; Huyskens, E.
Author_Institution :
Alcatel Bell, Antwerp, Belgium
Abstract :
A method to handle the testability of a variety of RAM and ROM structures with a self test is proposed. Coverage can be determined as a direct function of the test sequence length, and is sufficient for all present cases. The test cases show that this approach is most cost-effective for the RAM and ROM modules under consideration. Silicon overhead is kept low due to the maximal reuse of the functional logic. The resulting tester patterns require negligible tester memory
Keywords :
application specific integrated circuits; built-in self test; integrated circuit testing; random-access storage; read-only storage; RAM modules; ROM modules; embedded RAM; embedded ROM; functional logic; maximal reuse; self test; silicon overhead; test sequence length; testability; tester patterns; Automatic testing; Built-in self-test; Costs; Logic devices; Logic testing; Pins; Random access memory; Read only memory; Read-write memory; Telecommunications;
Conference_Titel :
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1990.186193
