Title :
FPGA implementation of an integer MIPS processor in Handel-C and its application to human face detection
Author :
Ramdas, Tirath ; Ang, Li-Minn ; Egan, Greg
Author_Institution :
Sch. of Eng., Monash Univ., Malaysia
Abstract :
We present an FPGA implementation of an integer-based MIPS processor using the Handel-C hardware design language (HDL). The processor is implemented on the RC200 development board from Celoxica. The processor implementation is modified from the standard MIPS architecture to take into account the limitations and features of the board. A face detection system is implemented with the processor to show its application towards real-time image processing.
Keywords :
face recognition; field programmable gate arrays; hardware description languages; FPGA; HDL; Handel-C hardware design language; RC200 development board; human face detection; integer MIPS processor; real-time image processing; Application software; Design engineering; Face detection; Field programmable gate arrays; Hardware design languages; Humans; Noise reduction; Registers; Streaming media; Systems engineering and theory;
Conference_Titel :
TENCON 2004. 2004 IEEE Region 10 Conference
Print_ISBN :
0-7803-8560-8
DOI :
10.1109/TENCON.2004.1414350
