DocumentCode :
2903546
Title :
Spectral RTL Test Generation for Gate-Level Stuck-at Faults
Author :
Yogi, Nitin ; Agrawal, Vishwani D.
Author_Institution :
Dept. of Electr. & Comput. Eng., Auburn Univ., AL
fYear :
2006
fDate :
20-23 Nov. 2006
Firstpage :
83
Lastpage :
88
Abstract :
We model RTL faults as stuck-at faults on primary inputs, primary outputs, and flip-flops. Tests for these faults are analyzed using Hadamard matrices for Walsh functions and random noise level at each primary input. This information then helps generate vector sequences. At the gate-level, a fault simulator and an integer linear program (ILP) compact the test sequences. We give results for four ITC´99 and four ISC AS´89 benchmark circuits, and an experimental processor. The RTL spectral vectors performed equally well on multiple gate-level implementations. Compared to a gate-level ATPG, RTL vectors produced similar or higher coverage in shorter CPU times
Keywords :
automatic test pattern generation; fault diagnosis; flip-flops; integrated circuit testing; logic testing; sequential circuits; Hadamard matrices; Walsh functions; fault simulation; flip-flops; gate-level stuck-at faults; integer linear program; random noise level; spectral RTL test generation; spectral vectors; vector sequences; Automatic test pattern generation; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Error correction; Error correction codes; Flip-flops; Noise level; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2006. ATS '06. 15th Asian
Conference_Location :
Fukuoka
ISSN :
1081-7735
Print_ISBN :
0-7695-2628-4
Type :
conf
DOI :
10.1109/ATS.2006.260997
Filename :
4030745
Link To Document :
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