DocumentCode
2903677
Title
Using dimensionality to achieve a sharp tunneling FET (TFET) turn-on
Author
Agarwal, Sapan ; Yablonovitch, Eli
Author_Institution
Univ. of California, Berkeley, Berkeley, CA, USA
fYear
2011
fDate
20-22 June 2011
Firstpage
199
Lastpage
200
Abstract
In order to achieve significantly reduced power consumption, the transistor operating voltage needs to be reduced. To do this, a tunneling based transistor needs to rely on the density of states turn-on. Current can only flow when the conduction and valence bands overlap. If the band edges are ideal, one might expect an infinitely sharp turn on when the band edges overlap. Surprisingly, in a typical 3d bulk TFET, the nature of the turn on is actually quadratic in the gate voltage. Nevertheless, it is possible improve this if dimensionality is reduced. Consequently, we explored the nature of the band overlap for the various dimensionalities. We find that a 2d-2d pn junction brings us significantly closer to an ideal step function. Confining each side of the pn junction will also significantly increase the on state conductivity at low voltages.
Keywords
field effect transistors; low-power electronics; p-n junctions; tunnelling; TFET; pn junction; reduced power consumption; sharp tunneling FET; tunneling based transistor; Junctions;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference (DRC), 2011 69th Annual
Conference_Location
Santa Barbara, CA
ISSN
1548-3770
Print_ISBN
978-1-61284-243-1
Electronic_ISBN
1548-3770
Type
conf
DOI
10.1109/DRC.2011.5994496
Filename
5994496
Link To Document