Title :
A Design of Pipelined Carry-dependent Sum Adder With its Self-checking Structure
Author :
Li, Ming ; Xu, Shiyi ; Cao, Jialin ; Ran, Feng ; Ma, Shiwei
Author_Institution :
Microelectron. Res. & Dev. Center, Shanghai Univ.
Abstract :
In this paper a pipelined carry-dependent sum adder with the self-checking structure is proposed. The adder includes four 8-bit carry-dependent sum adder (CDSA) , a 4-bit block carry look-ahead unit (BCLU) and a parity checker. The necessary area of the proposed adder is only about 3.85% over the traditional ripple carry adders, while the sum of the traditional adders is delayed by 39.2% with respect to the proposed adder for 32-bit implementation
Keywords :
adders; built-in self test; carry logic; logic testing; pipeline processing; 32 bit; 4 bit; 8 bit; block carry look-ahead unit; parity checker; pipelined carry-dependent sum adder; ripple carry adders; self-checking structure; Added delay; Adders; Circuit testing; Clocks; Computer science; Crosstalk; Fault tolerance; Integrated circuit synthesis; Microelectronics; Pipelines; Adder; Carry-dependent; Parity; Pipelined; Self-checking;
Conference_Titel :
Test Symposium, 2006. ATS '06. 15th Asian
Conference_Location :
Fukuoka
Print_ISBN :
0-7695-2628-4
DOI :
10.1109/ATS.2006.261019
