Title :
A Digital BIST Methodology for Spread Spectrum Clock Generators
Author :
Chou, Maohsuan ; Hsu, Jenchien ; Su, Chauchin
Author_Institution :
Dept. of Electr. & Control Eng., Nat. Chiao Tung Univ., Hsinchu
Abstract :
In this paper, a built-in-self-test methodology for spread-spectrum clock generators is presented. It utilizes a multi-phase phase detector to detect the linearity of the frequency variation and the short-term jitter. The methodology is analyzed and simulated. As an all digital design, the hardware overhead is very small
Keywords :
built-in self test; clocks; phase detectors; digital BIST methodology; digital design; frequency variation; multiphase phase detector; short-term jitter; spread spectrum clock generators; Built-in self-test; Circuits; Clocks; Electromagnetic interference; Hardware; Jitter; Linearity; Phase detection; Phase frequency detector; Spread spectrum communication;
Conference_Titel :
Test Symposium, 2006. ATS '06. 15th Asian
Conference_Location :
Fukuoka
Print_ISBN :
0-7695-2628-4
DOI :
10.1109/ATS.2006.261028
