DocumentCode
2904299
Title
A Self-Referred Clock Jitter Measurement Circuit in Wide Frequency Range
Author
Li, Chung-Yi ; Chou, Chia-Yuan ; Chang, Tsin-Yuan
Author_Institution
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu
fYear
2006
fDate
20-23 Nov. 2006
Firstpage
313
Lastpage
317
Abstract
In this paper, a jitter measurement circuit with its calibration scheme for measuring peak-to-peak jitters of clock is proposed and demonstrated. By applying the Vernier oscillators, the mismatching effect and area overhead are both reduced compared with conventional circuits using Vernier delay lines. With high resolution (7.98ps) and high speed (20.08ps/5k samples), the proposed circuit develops a tunable frequency range of input clock and improves the accuracy of the measurement results. The proposed circuit may be applied in multi-clocks´ measurement
Keywords
calibration; clocks; electric noise measurement; oscillators; timing circuits; timing jitter; Vernier delay lines; Vernier oscillators; calibration scheme; clock jitter measurement circuit; peak-to-peak jitter measurement; Clocks; Counting circuits; Delay effects; Detectors; Frequency measurement; Jitter; Oscillators; Phase detection; Signal processing; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2006. ATS '06. 15th Asian
Conference_Location
Fukuoka
ISSN
1081-7735
Print_ISBN
0-7695-2628-4
Type
conf
DOI
10.1109/ATS.2006.261037
Filename
4030785
Link To Document