DocumentCode
2904492
Title
Memory management in real-time multiprocessors
Author
Anantha, Kasi ; Tangman, David ; Gold, Daniel
Author_Institution
Dept. of Math. Sci., San Diego State Univ., CA, USA
fYear
1991
fDate
4-6 Nov 1991
Firstpage
54
Abstract
The Kumaran II architecture is a multiprocessor architecture targeted for real-time applications. The authors describe the specification and the implementation of the user-interface to Kumaran II memory management. Kumaran II contains seven MC68030 processors and 32 Mbyte of physical memory. Kumaran II enforces a strict memory management discipline which partitions the 32 M byte memory into seven 4 Mbyte local memories and one, 4 Mbyte shared memory area. A virtual memory system is provided by the MC68030. It was found that using virtual memory eliminates the chance of processors modifying the instructions and data of another processor and their own code. This in turn has reduced the amount of time spent in debugging multiprocessor applications. By avoiding paging to a secondary storage device and multi-level page tables, the normal overhead found in standard virtual memory implementations has been eliminated
Keywords
multiprocessing systems; real-time systems; storage management; user interfaces; virtual storage; 32 MB; 4 MB; Kumaran II architecture; Kumaran II memory management; MC68030 processors; local memories; real-time multiprocessors; shared memory area; strict memory management discipline; user interface specification; virtual memory system; Buffer storage; Central Processing Unit; Control systems; Gold; Hardware; Mathematical programming; Memory management; Multiprocessing systems; Programming profession; Real time systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 1991. 1991 Conference Record of the Twenty-Fifth Asilomar Conference on
Conference_Location
Pacific Grove, CA
ISSN
1058-6393
Print_ISBN
0-8186-2470-1
Type
conf
DOI
10.1109/ACSSC.1991.186413
Filename
186413
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