DocumentCode :
2904579
Title :
Minimizing Total Wire Length By Flipping Modules
Author :
Chong, KyunRak ; Sahni, Sartaj
Author_Institution :
HongIk University
fYear :
1992
fDate :
4-7 Jan 1992
Firstpage :
25
Lastpage :
30
Keywords :
Computer science; Euclidean distance; Neural networks; Polynomials; Simulated annealing; Terminology; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1992. Proceedings., The Fifth International Conference on
ISSN :
1063-9667
Print_ISBN :
0-8186-2465-5
Type :
conf
DOI :
10.1109/ICVD.1992.658016
Filename :
658016
Link To Document :
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