• DocumentCode
    2905704
  • Title

    Low-Power CMOS Comparator with Embedded Amplification for Ultra-high-speed ADCs

  • Author

    Oliveira, J.P. ; Goes, J. ; Esperança, B. ; Paulino, N. ; Fernandes, J.

  • Author_Institution
    Fac. de Ciencias e Tecnologia, UNINOVA, Monte da Caparica, Portugal
  • fYear
    2007
  • fDate
    27-30 May 2007
  • Firstpage
    3602
  • Lastpage
    3605
  • Abstract
    In this paper the challenge of improving the energy-efficiency of comparators is addressed, by proposing a novel comparator structure, to be used in ultra-high-speed ADCs. In this comparator, the pre-amplification is embedded in the input switched-capacitor network by using the passive-amplification capability of MOS devices. Simulated results show that this comparator exhibits low-offset ultra-fast regeneration-time and high energy-efficiency.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; comparators (circuits); low-power electronics; switched capacitor networks; CMOS comparator; MOS devices; analog-to-digital converters; switched-capacitor networks; CMOS technology; Capacitance; Energy efficiency; MOS devices; MOSFETs; Mechanical variables control; Pipelines; Switched capacitor networks; Varactors; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Print_ISBN
    1-4244-0920-9
  • Electronic_ISBN
    1-4244-0921-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2007.378532
  • Filename
    4253460
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2905704