A novel VLSI architecture for real time operations of one-bit coded synthetic radar imaging data

Author

Cimino, C. ; Franceschetti, G. ; Iodice, A. ; Mazzeo, A. ; Mazzocca, N. ; Napoli, E. ; Riccio, D. ; Spirito, P. ; Strollo, A. ; Tesauro, M.

Author_Institution

Dept. of Electron. Eng. & Telecommun., Naples Univ., Italy

Volume

1

fYear

1999

fDate

1999

Firstpage

515

Abstract

Real time processing for SAR data is a very useful tool in civilian and military applications. However, in order to avoid resolution degradation, a very short time must be required for each single multiplication. This condition can be verified by using one-bit coded data and reference function: in fact, in this case operations can be performed by XNOR gates. In this paper, a VLSI architecture for real time one-bit processing is presented, and first performance tests are reported

Keywords

geophysical signal processing; geophysical techniques; radar imaging; remote sensing by radar; signal processing equipment; synthetic aperture radar; terrain mapping; SAR; VLSI architecture; XNOR gate; electronics; geophysical measurement technique; land surface; one-bit coded data; radar imaging; radar remote sensing; real time operation; real time processing; reference function; signal processing; synthetic aperture radar; synthetic radar imaging; terrain mapping; Adders; Azimuth; Circuits; Convolution; Data engineering; Degradation; Information technology; Radar imaging; Time domain analysis; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Geoscience and Remote Sensing Symposium, 1999. IGARSS '99 Proceedings. IEEE 1999 International

Conference_Location

Hamburg

Print_ISBN

0-7803-5207-6

Type

conf

DOI

10.1109/IGARSS.1999.773551

Filename

773551