DocumentCode :
2905997
Title :
Instruction compression and encoding for low-power systems
Author :
Kadayif, Ismail ; Kandemir, Mahmut T.
Author_Institution :
Microsyst. Design Lab., Pennsylvania State Univ., USA
fYear :
2002
fDate :
25-28 Sept. 2002
Firstpage :
301
Lastpage :
305
Abstract :
Low-power system design is very important in battery-operated embedded systems. Since instruction memory constitutes a large portion of the system, it is one of the major energy contributors. In this paper, we propose two selective instruction compression methods for reducing instruction memory and instruction bus energy consumption. In these methods, both compressed and uncompressed instructions are stored in the instruction memory in a mixed fashion. The compressed instructions are decompressed on-the-fly by means of an instruction decode table placed between instruction memory and core. Our methods selectively compress instructions in the sense that while some instances of a given instruction are compressed, some other instances of the same instruction are not. Even though both of the proposed methods can reduce both dynamic and leakage energy consumption in the instruction memory, one of them is more oriented towards reducing dynamic energy, whereas the other one mainly targets leakage. To reduce the instruction bus energy consumption further, we also propose a heuristic method for coding compressed instructions to reduce bit switching on the bus.
Keywords :
circuit CAD; circuit simulation; data compression; embedded systems; encoding; instruction sets; integrated memory circuits; logic CAD; logic simulation; low-power electronics; microprocessor chips; system buses; battery-operated embedded systems; bus bit switching; dynamic/leakage energy consumption; heuristic instruction coding methods; instruction bus energy consumption; instruction decode tables; instruction encoding; instruction memory energy consumption; low-power system instruction compression; mixed compressed/uncompressed instruction storage; on-the-fly decompression; selective instruction compression methods; Bandwidth; Decoding; Embedded system; Encoding; Energy consumption; Kernel; Logic; Power dissipation; Thumb;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC/SOC Conference, 2002. 15th Annual IEEE International
Print_ISBN :
0-7803-7494-0
Type :
conf
DOI :
10.1109/ASIC.2002.1158075
Filename :
1158075
Link To Document :
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