CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs

Author

Zarandi, Hamid R. ; Miremadi, Seyed G. ; Argyrides, Costas ; Pradhan, Dhiraj K.

Author_Institution

Dept. of Comput. Eng., Sharif Univ. of Technol., Tehran

fYear

2007

fDate

27-30 May 2007

Firstpage

3696

Lastpage

3699

Abstract

This paper presents a bit-flip tolerance in SRAM-based FPGAs which suffers from high energy particles, alpha and neutrons in the atmosphere. For each of protections, the applicability, efficiency and implementation issues are discussed. Moreover, the area, the power and the protection capability of the methods are mentioned and compared with previous work. Based on the results of experiments and their analysis, one method is selected as best one. The selected method is much better than previous work e.g., duplication with comparison, triple modular redundancy which impose two and three area and power overheads, respectively.

Keywords

SRAM chips; field programmable gate arrays; CLB-based correction; CLB-based detection; SRAM-based FPGA; atmosphere; bit-flip faults; high energy alpha; high energy neutrons; high energy particles; power overheads; triple modular redundancy; Clocks; Error correction; Fault detection; Field programmable gate arrays; Neutrons; Protection; Reconfigurable logic; Single event transient; Single event upset; Table lookup;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378645

Filename

4253483