Title :
S5: the architecture and development flow of a software configurable processor
Author :
Arnold, Jeffrey M.
Author_Institution :
Stretch, Inc., Mountain View, CA
Abstract :
A software configurable processor (SCP) is a hybrid device that couples a conventional processor datapath with programmable logic to allow application programs to dynamically customize the instruction set. SCP architectures can offer significant performance gains by exploiting data parallelism, operator specialization and deep pipelines. The S5000 is a family of high performance software configurable processors for embedded applications. The S5000 consists of a conventional 32-bit RISC processor coupled with a programmable instruction set extension fabric (ISEF). To develop an application for the S5 the programmer identifies critical sections to be accelerated, writes one or more extension instructions as functions in a variant of the C programming language, and accesses those functions from the application program. Performance gains of more than an order of magnitude over the unaccelerated processor can be achieved
Keywords :
embedded systems; instruction sets; logic design; microprocessor chips; reconfigurable architectures; reduced instruction set computing; 32 bit; C programming language; RISC processor; S5; S5000 family; data parallelism; embedded computing; instruction set extension fabric; processor datapath; programmable logic; reconfigurable architectures; software configurable processor; Application software; Computer architecture; Embedded software; Logic devices; Performance gain; Pipelines; Programmable logic arrays; Programmable logic devices; Reduced instruction set computing; Software performance;
Conference_Titel :
Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on
Conference_Location :
Singapore
Print_ISBN :
0-7803-9407-0
DOI :
10.1109/FPT.2005.1568535