Asynchronous Adiabatic Logic

Power clock generators (PCGs) are the prevalent overhead for the adiabatic systems and mutilate all the low-power advantage from the adiabatic logic part by consuming a large portion of the total power in the clock generation circuitry (Arsalan and Shams, 2005). In addition to the PCG issues, routing multiple clock phases for adiabatic circuits is not very convenient and raises a number of cost, performance and viability issues. To get rid of the problems related to clock generation and synchronous clock routing, a new solution namely asynchronous adiabatic logic (AAL) is proposed to combing the benefits of the adiabatic logic circuits with that of asynchronous logic systems. Going asynchronous not only eliminates the need of PCGs, hence all the problems associated with the generation and routing of the clocks, it also bring all the advantages intrinsically associated with an asynchronous design such as low power and reliable logical operation.