A 109 nW, 44 ppm/Â°C CMOS Current Reference with Low Sensitivity to Process Variations

Author

De Vita, Giuseppe ; Iannaccone, Giuseppe

Author_Institution

Dipt. di Ingegneria dell´´ Informazione: Elettronica, Informatica, Telecomunicazioni, Universita degli Studi di Pisa

fYear

2007

fDate

27-30 May 2007

Firstpage

3804

Lastpage

3807

Abstract

We present the design of a circuit, implemented in a standard 0.35 mum CMOS process, that provides a bias current practically independent of temperature and process variations. Experimental results show that the proposed circuit provides a reference current with a temperature coefficient of 44 ppm/degC over a range from 0 to 80 degC. The reference current is generated by exploiting a MOS transistor as current defining element, instead of a resistor, allowing us to achieve a relative standard deviation due to process variations of 2% . The minimum supply voltage is 1.3 V and the minimum supply current is 36 nA. The line sensitivity is 569 ppm/V. The chip area is 0.035 mm².

Keywords

CMOS integrated circuits; reference circuits; 0 to 80 C; 0.35 micron; 1.3 V; 109 nW; 36 nA; CMOS current reference circuit; CMOS process; MOS transistor; current defining element; Batteries; CMOS process; Circuits and systems; Current supplies; Low voltage; MOSFETs; Resistors; Telecommunication standards; Temperature distribution; Temperature sensors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378790

Filename

4253510