DocumentCode
2906667
Title
A Reduced-Area, Low-Power CMOS Bandgap Reference Circuit
Author
Koudounas, Savvas ; Georgiou, Julius
Author_Institution
Dept. of Electr. & Comput. Eng., Cyprus Univ., Nicosia
fYear
2007
fDate
27-30 May 2007
Firstpage
3832
Lastpage
3835
Abstract
This paper presents a low-voltage, reduced-area CMOS bandgap reference (BGR) circuit for low-power applications. Significant area reduction is achieved by utilizing a resistive T-network in combination with layout-efficient opamp compensation. A complete analysis, including the dual-loop stability, reveals several tradeoffs between area, loop-gain, stability and offset sensitivity. Based on this analysis, a high-performance design, in a 0.18mum CMOS process, is presented.
Keywords
CMOS integrated circuits; low-power electronics; operational amplifiers; reference circuits; 0.18 micron; CMOS bandgap reference circuit; CMOS process; dual-loop stability; layout-efficient opamp compensation; low-power applications; resistive T-network; Application software; CMOS process; CMOS technology; Circuit stability; Diodes; Photonic band gap; Resistors; Stability analysis; Temperature; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location
New Orleans, LA
Print_ISBN
1-4244-0920-9
Electronic_ISBN
1-4244-0921-7
Type
conf
DOI
10.1109/ISCAS.2007.377874
Filename
4253517
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