FPGA-based conformance testing and system prototyping of an MPEG-4 SA-DCT hardware accelerator

Author

Kinane, Andrew ; Casey, Alan ; Muresan, Valentin ; O´Connor, Noel

Author_Institution

Centre for Digital Video Process., Dublin City Univ.

fYear

2005

fDate

11-14 Dec. 2005

Firstpage

317

Lastpage

318

Abstract

Two FPGA implementations of a shape adaptive discrete cosine transform (SA-DCT) accelerator are presented in this paper: one PCI-based and the other AMBA-based. The former is used for conformance testing with the MPEG-4 standard requirements. The latter is an alternative platform for system prototyping and has an architecture more representative of a mobile device. The proposed accelerator meets real time constraints on both platforms with a gate count of approximately 40k, and outperforms the optimised reference software implementation by 20times. It is estimated that the accelerator consumes 250mW on a Virtex-E FPGA and 79mW on a Virtex-II FPGA in the worst case scenario

Keywords

conformance testing; discrete cosine transforms; field programmable gate arrays; logic design; transform coding; video coding; 250 mW; 79 mW; AMBA-based implementation; FPGA implementations; MPEG-4 standard; PCI-based implementation; SA-DCT hardware accelerator; Virtex-E FPGA; Virtex-II FPGA; gate count; shape adaptive discrete cosine transform; Computer architecture; Discrete cosine transforms; Field programmable gate arrays; Hardware; Life estimation; MPEG 4 Standard; Prototypes; Shape; Software prototyping; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on

Conference_Location

Singapore

Print_ISBN

0-7803-9407-0

Type

conf

DOI

10.1109/FPT.2005.1568579

Filename

1568579