DocumentCode
2906821
Title
FPGA core network implementation and optimization: a case study
Author
Fischaber, S. ; Hasson, R. ; McAllister, J. ; Woods, R.
Author_Institution
Programmable Syst. Lab., Queen´´s Univ. Belfast
fYear
2005
fDate
11-14 Dec. 2005
Firstpage
319
Lastpage
320
Abstract
It is becoming increasingly important to realize and optimize hardware functionality from high level descriptions. This paper explores the Muir approach, which integrates core based reuse and optimization principles in a heterogeneous system context. This is discussed in the context of a fixed beamformer system to highlight the rapid implementation power of such an approach
Keywords
circuit optimisation; field programmable gate arrays; logic design; FPGA core network implementation; FPGA core network optimization; Muir approach; core based optimization principle; core based reuse principle; fixed beamformer system; heterogeneous system; Automatic generation control; Computer aided software engineering; Digital signal processing; Field programmable gate arrays; Finite impulse response filter; Hardware; Laboratories; Sensor arrays; Sensor systems; Software tools;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on
Conference_Location
Singapore
Print_ISBN
0-7803-9407-0
Type
conf
DOI
10.1109/FPT.2005.1568580
Filename
1568580
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