Title :
Total-dose worst-case test vectors for logic faults induced in combinational circuits of cell-based ASICs
Author :
Abou-Auf, Ahmed A. ; Abdel-Aziz, Hamzah A. ; Abdel-Aziz, Mostafa M.
Author_Institution :
Electron. Eng. Dept., American Univ. in Cairo, New Cairo, Egypt
Abstract :
We developed a methodology for identifying worst-case test vectors for logic faults induced in combinational circuits of cell-based ASICs induced by total dose. This methodology is independent of the design tools and the process technology.
Keywords :
application specific integrated circuits; combinational circuits; integrated circuit testing; logic testing; cell-based ASIC combinational circuit; logic fault; total-dose worst-case test vector; CMOS; logic faults; test vectors; total dose; worst-case;
Conference_Titel :
Radiation and Its Effects on Components and Systems (RADECS), 2009 European Conference on
Conference_Location :
Bruges
Print_ISBN :
978-1-4577-0492-5
Electronic_ISBN :
0379-6566
DOI :
10.1109/RADECS.2009.5994669
