A 64 channel programmable receiver chip for 3G wireless infrastructure

Author

Sriram, Sundararajan ; Brown, Kathy ; Defosseux, Raphael ; Moerman, Filip ; Paviot, Olivier ; Sundararajan, Vijay ; Gatherer, Alan

Author_Institution

Wireless Infrastructure Bus. Unit, Texas Instruments Inc., Dallas, TX, USA

fYear

2005

fDate

18-21 Sept. 2005

Firstpage

59

Lastpage

62

Abstract

We present a CDMA wireless infrastructure chip that handles digital baseband receive functions for up to 64 voice channels, representing over 150 GOPS of computation, and dissipating 32mW/channel. Vector datapaths and two embedded ARM cores are employed for flexibility and high channel density. The chip is fabricated in a 130 nm 7 layer metal process and contains 75M transistors.

Keywords

3G mobile communication; application specific integrated circuits; code division multiple access; integrated circuit design; 130 nm; 32 mW; 3G wireless infrastructure; CDMA wireless infrastructure chip; digital baseband receive functions; embedded ARM cores; programmable receiver chip; vector datapaths; Base stations; Baseband; Coprocessors; Cost function; Digital signal processing; Modems; Multiaccess communication; Signal processing; Signal sampling; Technological innovation;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005

Print_ISBN

0-7803-9023-7

Type

conf

DOI

10.1109/CICC.2005.1568607

Filename

1568607