A heterogeneous functional verification platform

This paper presents a distributed verification platform that supports heterogeneous simulation environments, test formats, design HDLs, assertion languages and analysis tools. The Web-based platform provides integrated functional verification for complex integrated circuit designs such as processors that include units designed in VHDL, Verilog or SystemC and their corresponding assertions in Verilog, VHDL, C or PSL. The platform has been deployed at the IBM PowerPC embedded processors design center and has shown improved verification efficiency and coverage with reduced simulation resources.