DocumentCode :
2907268
Title :
Multi-Site and Multi-Probe Substrate Testing on an ATE
Author :
Ma, Xiaojun ; Lombardi, Fabrizio
Author_Institution :
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA
fYear :
2006
fDate :
4-6 Oct. 2006
Firstpage :
495
Lastpage :
506
Abstract :
This paper presents a novel method that utilizes multi-site and multi-probe facilities in an ATE for substrate testing. The test time for a batch can be considerably reduced by efficiently utilizing an ATE with a number of flying-probes and multiple substrates under test (SUTs). An analytical model that predicts very accurately the batch test time is proposed. This model establishes the optimal multi-site configuration as corresponding to the batch size that allow multiple SUTs to be simultaneously tested on a ATE. Simulation results for an ATE with 12 flying-probe as example of a commercially available tester are provided; for this ATE the proposed method achieves a reduction of 54.66% in test time over a single-site method (at complete coverage of the modeled faults)
Keywords :
automatic test equipment; multichip modules; substrates; ATE; automatic test equipment; batch test time; multiprobe substrate testing; multisite substrate testing; optimal multisite configuration; substrates under test; Analytical models; Circuit faults; Costs; Coupling circuits; Electrical fault detection; Electronic equipment testing; Integrated circuit interconnections; Manufacturing; Sequential analysis; System testing; ATE; MCM.; manufacturing test; multi-probe; multi-site; substrate testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2006. DFT '06. 21st IEEE International Symposium on
Conference_Location :
Arlington, VA
ISSN :
1550-5774
Print_ISBN :
0-7695-2706-X
Type :
conf
DOI :
10.1109/DFT.2006.45
Filename :
4030962
Link To Document :
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