Title :
A digital 120Mb/s MIMO-OFDM baseband processor for high speed wireless LANs
Author :
Jung, Yunho ; Kim, Jiho ; Noh, Seungpyo ; Yoon, Hongil ; Kim, Jaeseok
Author_Institution :
Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea
Abstract :
In this paper, we present the implementation results of a digital 120Mb/s MIMO-OFDM wireless LAN (WLAN) baseband processor based on the proposed decoding algorithms. The processor has two MIMO-OFDM modes, space-frequency block coded OFDM (SFBC-OFDM) and space division multiplexed OFDM (SDM-OFDM). From those, it achieves a considerable performance gain as well as supports double data rates compared to the conventional IEEE 802.11a WLANs. In the results of performance evaluation, the processor requires a SNR of 1.8-27 dB for transmission modes at 10 % packet error rate (PER), and the chip is implemented with 4.8M transistors in 3.9×3.9 mm2 using 0.18μm CMOS process.
Keywords :
CMOS digital integrated circuits; IEEE standards; MIMO systems; OFDM modulation; block codes; decoding; microprocessor chips; wireless LAN; 0.18 micron; 120 Mbit/s; CMOS process; IEEE 802.11a WLAN; MIMO-OFDM baseband processor; decoding algorithms; packet error rate; space division multiplexed OFDM; space-frequency block coded OFDM; transmission modes; wireless local area network; Bandwidth; Baseband; Binary phase shift keying; Decoding; Fading; Local area networks; MIMO; OFDM; Quadrature phase shift keying; Wireless LAN;
Conference_Titel :
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Print_ISBN :
0-7803-9023-7
DOI :
10.1109/CICC.2005.1568613
