DocumentCode
2907314
Title
Data Dependent Jitter Characterization Based on Fourier Analysis
Author
Mu, Di ; Xia, Tian ; Zheng, Hao
Author_Institution
Dept. of Electr. & Comput. Eng., Vermont Univ., Burlington, VT
fYear
2006
fDate
Oct. 2006
Firstpage
534
Lastpage
544
Abstract
In this paper, the authors focus on modeling the data dependent jitter (DDJ) in high-speed interconnect. To investigate the data dependent jitter, the analysis is performed with Fourier series based on the interconnect RLC model. By calculating the pattern dependent delay deviation, the data dependent jitter is characterized. To validate the modeling accuracy, the analysis results have been compared against the Cadence simulations
Keywords
Fourier analysis; Fourier series; delays; electronic design automation; integrated circuit interconnections; Cadence simulations; Fourier analysis; Fourier series; data dependent jitter characterization; delay deviation calculation; high-speed interconnect; interconnect RLC model; Bandwidth; Bit error rate; Data engineering; Delay; Distributed parameter circuits; Fourier series; Integrated circuit interconnections; Thermal conductivity; Timing jitter; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 2006. DFT '06. 21st IEEE International Symposium on
Conference_Location
Arlington, VA
ISSN
1550-5774
Print_ISBN
0-7695-2706-X
Type
conf
DOI
10.1109/DFT.2006.19
Filename
4030966
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