Title :
A 45.6-GHz matrix distributed amplifier in 0.18-nm CMOS
Author :
Chen, Tai-Yuan ; Chien, Jun-Chau ; Lu, Liang-Hung
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper presents a fully integrated matrix distributed amplifier fabricated in a standard 0.18-μm CMOS process. With periodically loaded coplanar waveguides (CPW) as the synthetic transmission lines and cascode amplifiers as the gain cells, the 2×4 matrix amplifier is proposed to achieve a high gain over an extended frequency band. The fabricated circuit exhibits a gain of 6.7 dB with a 3-dB bandwidth of 45.6 GHz. Both input and output return losses are better than 10 dB within the entire frequency range. The chip size of the matrix amplifier is 1.8×1.05 mm2 including the testing pads.
Keywords :
CMOS integrated circuits; coplanar waveguides; distributed amplifiers; integrated circuit design; 18 nm; 45.6 GHz; 6.7 dB; CMOS process; cascode amplifiers; gain cells; matrix distributed amplifier; periodically loaded coplanar waveguides; return loss; synthetic transmission lines; Bandwidth; CMOS process; Coplanar transmission lines; Coplanar waveguides; Distributed amplifiers; Distributed parameter circuits; Frequency; Gain; Loaded waveguides; Transmission line matrix methods;
Conference_Titel :
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Print_ISBN :
0-7803-9023-7
DOI :
10.1109/CICC.2005.1568622
