Title :
An Architecture To Test Random Access Memories
Author_Institution :
Case Western Reserve University
Keywords :
Built-in self-test; Circuit faults; Circuit testing; Computer architecture; Decoding; Design engineering; Design methodology; Hardware; Random access memory; Read-write memory;
Conference_Titel :
VLSI Design, 1992. Proceedings., The Fifth International Conference on
Print_ISBN :
0-8186-2465-5
DOI :
10.1109/ICVD.1992.658036
