DocumentCode
2908436
Title
A Direct Digital Frequency Synthesizer with CMOS OTP ROM§
Author
Huang, Chi-Chun ; Jhuang, Guo-Lin ; Wang, Chua-Chin
Author_Institution
Nat. Sun Yat-Sen Univ., Kaohsiung
fYear
2007
fDate
26-28 Sept. 2007
Firstpage
92
Lastpage
95
Abstract
A direct digital frequency synthesizer (DDFS) using on-chip CMOS one-time programmable read-only memory (OTP ROM) are presented. A straight-line approximation algorithm for sinusoid with compensation is adopted such that the accuracy could be maintained and the cost is reduced. Most important of all, a CMOS OTP ROM is employed as a look-up ROM table to simplify the ROM fabrication without any additional process steps. The proposed DDFS design is implemented using a typical 1P6M 0.18 mum CMOS process. It has a 12-bit amplitude resolution with 86.89 dB spurious free dynamic range (SFDR) using a small ROM size of 256 bits.
Keywords
CMOS integrated circuits; direct digital synthesis; read-only storage; table lookup; CMOS one-time programmable read-only memory; direct digital frequency synthesizer; look-up table; size 0.18 mum; spurious free dynamic range; straight-line approximation; word length 12 bit; word length 256 bit; CMOS process; Communication switching; Costs; EPROM; Frequency synthesizers; Manufacturing processes; Message-oriented middleware; Nonvolatile memory; Phase locked loops; Read only memory; DDFS; OTP; frequency synthesizer; one-time programmable; straight-line approximation;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits, 2007. ISIC '07. International Symposium on
Conference_Location
Singapore
Print_ISBN
978-1-4244-0797-2
Electronic_ISBN
978-1-4244-0797-2
Type
conf
DOI
10.1109/ISICIR.2007.4441804
Filename
4441804
Link To Document