• DocumentCode
    2908470
  • Title

    Accelerating a Virtual Ecology Model with FPGAs

  • Author

    Lamoureux, Julien ; Field, Tony ; Luk, Wayne

  • Author_Institution
    Deptartment of Comput., Imperial Coll. London, London, UK
  • fYear
    2009
  • fDate
    7-9 July 2009
  • Firstpage
    67
  • Lastpage
    74
  • Abstract
    This paper describes the acceleration of virtual ecology models using field-programmable gate arrays (FPGAs). Our approach targets models generated by the Virtual Ecology Workbench (VEW); an existing tool used by biological oceanographers to build and analyze models of the plankton ecosystem in the upper ocean. Depending on the plankton study and required level of detail, the logic, memory, and data transfer requirements of the generated models can vary significantly. Using FPGAs, hardware implementations can be customized to the specific requirements of the ecological system under study and provide significant speed-ups compared to software implementations. This paper describes a framework for maximizing the speedup of VEW generated models implemented on FPGA-based acceleration platforms and then describes the implementation of a typical VEW generated model to validate the framework and demonstrate that significant speedups are possible. Based on timing and area estimates from a commercial synthesis tool, the example model implemented on a Celoxica RCHTX acceleration board featuring a Xilinx Virtex-4 FPGA performs 39 times faster at 150 MHz than the software implementation on an AMD Opteron 2200 series CPU at 1.0 GHz.
  • Keywords
    field programmable gate arrays; microorganisms; oceanography; performance evaluation; AMD Opteron 2200 series; Celoxica RCHTX acceleration board; FPGA; VEW; Virtual Ecology Workbench; Xilinx Virtex 4 FPGA; accelerating virtual ecology model; biological oceanographer; commercial synthesis tool; ecological system; field programmable gate array; plankton ecosystem; Acceleration; Biological system modeling; Ecosystems; Environmental factors; Field programmable gate arrays; Hardware; Logic; Marine vegetation; Oceans; Timing; FPGA; ecology modeling; hardware acceleration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application-specific Systems, Architectures and Processors, 2009. ASAP 2009. 20th IEEE International Conference on
  • Conference_Location
    Boston, MA
  • ISSN
    2160-0511
  • Print_ISBN
    978-0-7695-3732-0
  • Electronic_ISBN
    2160-0511
  • Type

    conf

  • DOI
    10.1109/ASAP.2009.27
  • Filename
    5200012