Low-noise embedded CAM with reduced slew-rate match-lines and asynchronous search-lines

Author

Arsovski, Igor ; Nadkarni, Rahul

Author_Institution

IBM, Essex Junction, VT, USA

fYear

2005

fDate

18-21 Sept. 2005

Firstpage

447

Lastpage

450

Abstract

An embedded content addressable memory (eCAM) uses reduced slew-rate match-line sensing and asynchronous search-line switching to decrease power supply noise while achieving high search speed and low power. When compared to a previous state-of-the-art eCAM, the new design reduces 44% of peak power-supply noise while performing 352M searches/second and consuming 260mW. This reduction in noise directly reduces the amount of decoupling capacitance and, with it, overall chip area. This paper also presents built-in self test patterns for testing search margin and susceptibility to power supply noise. The low-noise eCAM macro has been implemented in 90nm 1.2V CMOS process and is fully functional over a voltage range of 0.7V - 2.05V.

Keywords

CMOS memory circuits; built-in self test; content-addressable storage; embedded systems; integrated circuit design; integrated circuit noise; integrated circuit testing; 0.7 to 2.05 V; 1.2 V; 260 mW; 90 nm; CMOS process; asynchronous search-lines; built-in self test patterns; decoupling capacitance; embedded content addressable memory; low noise embedded CAM; power supply noise; slew-rate match-lines; CADCAM; Circuit noise; Computer aided manufacturing; Laser sintering; Multilevel systems; Noise reduction; Power supplies; Switches; Voltage; Working environment noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005

Print_ISBN

0-7803-9023-7

Type

conf

DOI

10.1109/CICC.2005.1568702

Filename

1568702