DocumentCode :
2908780
Title :
A soft-error-immune maintenance-free TCAM architecture with associated embedded DRAM
Author :
Noda, Hideyuki ; Dosaka, Katsumi ; Morishita, Fukashi ; Arimoto, Kazutami
Author_Institution :
Syst. Core Technol. Div., Renesas Technol. Corp., Hyogo, Japan
fYear :
2005
fDate :
18-21 Sept. 2005
Firstpage :
451
Lastpage :
454
Abstract :
This paper describes a novel TCAM architecture with associated embedded DRAM. The design concept improves the soft error immunity by 6 digits, and also resolves the critical problems of the look-up table maintenance of TCAM. The proposed architecture in this paper is especially attractive for realizing soft-error immune, high-performance TCAM chips.
Keywords :
DRAM chips; content-addressable storage; embedded systems; memory architecture; table lookup; TCAM architecture; TCAM chips; embedded DRAM; look-up table; soft error immunity; ternary content addressable memory; Cams; Circuits; Decoding; Degradation; Error correction; Error correction codes; Maintenance; Random access memory; Table lookup; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Print_ISBN :
0-7803-9023-7
Type :
conf
DOI :
10.1109/CICC.2005.1568703
Filename :
1568703
Link To Document :
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