DocumentCode :
2908906
Title :
Characterization of On-Wafer Vias for CMOS RFICs
Author :
Shi, Xiaomeng ; Yeo, Kiat Seng ; Do, Manh Anh ; Boon, Chirn Chye
Author_Institution :
Nanyang Technol. Univ.
fYear :
2007
fDate :
26-28 Sept. 2007
Firstpage :
192
Lastpage :
195
Abstract :
Characterization of a single on-wafer via using a 0.18-mum RFCMOS technology is presented in this paper. The equivalent resistance and inductance of the via are extracted from full wave simulations up to 30 GHz frequency range. The de-embedding method is also discussed.
Keywords :
CMOS integrated circuits; radiofrequency integrated circuits; CMOS RFIC; RFCMOS technology; deembedding method; equivalent inductance; equivalent resistance; on-wafer vias; size 0.18 mum; CMOS technology; Circuit simulation; Explosives; Inductance; Integrated circuit interconnections; Performance evaluation; Radio frequency; Radiofrequency integrated circuits; Silicon; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits, 2007. ISIC '07. International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-0797-2
Electronic_ISBN :
978-1-4244-0797-2
Type :
conf
DOI :
10.1109/ISICIR.2007.4441830
Filename :
4441830
Link To Document :
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