Metal semiconductor (MES) TSVs in 3D ICs: Electrical modeling and design

Author

Engin, A. Ege ; Raghavan, N.S.

Author_Institution

Dept. of Electr. & Comput. Eng., San Diego State Univ., San Diego, CA, USA

fYear

2012

fDate

Jan. 31 2012-Feb. 2 2012

Firstpage

1

Lastpage

4

Abstract

TSVs are are separated with a thin dielectric liner from the lossy Silicon substrate, hence they behave as metal-insulator-semiconductor (MIS) structures. They support slow-wave and dielectric quasi-TEM modes, which are characteristic for MIS transmission lines. This paper presents the electrical design and modeling of a new TSV type, called metal semiconductor (MES) TSV. In MES TSV, there is no dielectric liner between the metal and Silicon. We investigate the advantage of MES TSV, compared to standard MIS TSV, in terms of its capability to carry high frequency signals and reduce cross talk. We propose to use MES TSVs especially for ground TSVs.

Keywords

MIS structures; elemental semiconductors; silicon; three-dimensional integrated circuits; 3D IC; MES TSV; MIS structures; MIS transmission lines; Si; cross talk reduction; dielectric quasi TEM modes; electrical modeling; high frequency signals; lossy Silicon substrate; metal semiconductor TSV; metal-insulator-semiconductor structures; thin dielectric liner; Capacitance; Couplings; Crosstalk; Integrated circuit modeling; Silicon; Substrates; Through-silicon vias; 3D IC; cross talk; metal-insular-semiconductor transmission line; through silicon via;

fLanguage

English

Publisher

ieee

Conference_Titel

3D Systems Integration Conference (3DIC), 2011 IEEE International

Conference_Location

Osaka

Print_ISBN

978-1-4673-2189-1

Type

conf

DOI

10.1109/3DIC.2012.6263049

Filename

6263049