RF ESD protection strategies - the design and performance trade-off challenges

Author

Jansen, Ph. ; Thijs, S. ; Linten, D. ; Natarajan, M.I. ; Vassilev, V. ; Liu, M. ; Concannon, A. ; Trémouilles, D. ; Nakaie, T. ; Sawada, M. ; Vashchenko, V. ; Beek, M. Ter ; Hasebe, T. ; Decoutere, S. ; Groeseneken, G.

Author_Institution

Inter-Univ. Micro-Electron. Center, Leuven

fYear

2005

fDate

21-21 Sept. 2005

Firstpage

489

Lastpage

496

Abstract

ESD protection strategies utilized in RF circuit applications in CMOS and BiCMOS technologies are investigated and the results are presented in this paper. The conventional approach using diodes with power clamp is compared with novel approaches such as plug-and-play passive elements and full or partial circuit-ESD co-design. The trade-offs are discussed from both RF and ESD point of views. Common problems as parasitic ESD current discharge paths and voltage overshoot are discussed and solutions are proposed

Keywords

BiCMOS integrated circuits; CMOS integrated circuits; electrostatic discharge; radiofrequency integrated circuits; BiCMOS technology; CMOS technology; ESD current discharge paths; RF ESD protection; RF circuits; diode devices; electrostatic discharge protection; power clamp; voltage overshoot; BiCMOS integrated circuits; CMOS technology; Clamps; Degradation; Electronics industry; Electrostatic discharge; MOS devices; Protection; Radio frequency; Semiconductor diodes;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005

Conference_Location

San Jose, CA

Print_ISBN

0-7803-9023-7

Type

conf

DOI

10.1109/CICC.2005.1568713

Filename

1568713