Self-aligned Block Oxide Process for bSPIFETs

In order to further simplify the process flow and eliminate the device misalignment of the Si-body to the poly gate in a bSPIFET (Si on partial insulator with block oxide field-effect transistor) [1], a new self-aligned (SA) process has been successfully developed. The aim of this work is to investigate the device behavior of SA-bSPIFET as a function of gate length. According to the simulation studies, the electrical characteristics of SA-bSPIFET are similar to ultra-thin source/drain (S/D) PUSD PiFET and ultra-thin body silicon-on-insulator (TJTBSOI) FET, although the junction depth of S/D regions for SA-bSPIFET is thicker than those of ultra-thin S/D-based structures. This is because the block oxide on the sidewall of the Si-body can significantly reduce the charge sharing effects resulting in good short-channel properties. Moreover, owing to the presence of the body-tied scheme, the thermal stability of SA-bSPIFET can also be ameliorated when compared with the SOI transistors.