DocumentCode :
2909193
Title :
Full-rate injection-locked 10.3Gb/s clock and data recovery circuit in a 45GHz-fT SiGe process
Author :
Zhan, Jing-Hong Conan ; Duster, Jon S. ; Kornegay, Kevin T.
Author_Institution :
Cornell Univ., Ithaca, NY
fYear :
2005
fDate :
21-21 Sept. 2005
Firstpage :
552
Lastpage :
555
Abstract :
We present a 10.3Gb/s full-rate fully integrated injection-locked CDR circuit with a BER lower than 1e-12 over a 160MHz lock range. With a 33V supply, the CDR core and the output buffers consume 230mW and 175mW, respectively, while occupying an active area of 730mum times 680mum. The CDR is fabricated in a mature 45-GHz fT SiGe BiCMOS technology
Keywords :
BiCMOS integrated circuits; Ge-Si alloys; buffer circuits; clocks; millimetre wave integrated circuits; 10.3 Gbit/s; 175 mW; 230 mW; 3.3 V; 45 GHz; 680 micron; 730 micron; BER; CDR core; SiGe; SiGe BiCMOS technology; SiGe process; clock and data recovery circuit; injection-locked CDR circuit; output buffers; Circuits; Clocks; Delay; Frequency; Germanium silicon alloys; Latches; Logic; Silicon germanium; Voltage-controlled oscillators; Voting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-9023-7
Type :
conf
DOI :
10.1109/CICC.2005.1568729
Filename :
1568729
Link To Document :
بازگشت