DocumentCode
2909249
Title
Energy-aware run-time mapping for homogeneous NoC
Author
Sun, Guang ; Li, Yong ; Zhang, Yuanyuan ; Su, Li ; Jin, Depeng ; Zeng, Lieguang
Author_Institution
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
fYear
2010
fDate
29-30 Sept. 2010
Firstpage
8
Lastpage
11
Abstract
Achieving effective run-time mapping for Network on Chip (NoC) is a big challenge, particularly since the execution time and arrival order of applications are not known a priori. In this paper, we propose an energy-aware run-time mapping scheme, which consists of region selection algorithm and core mapping algorithm, for homogeneous NoC. The proposed scheme minimizes the energy consumption of the currently incoming application, and moreover, allows for additional applications to be easily added to the system with minimal energy consumption. Simulation results demonstrate the effectiveness of our proposed scheme in communication energy saving, when compared with the schemes in some previous work.
Keywords
logic design; network-on-chip; arrival order; communication energy saving; core mapping algorithm; energy consumption; energy-aware run-time mapping; execution time; homogeneous NoC; network on chip; region selection algorithm; Energy consumption; Heuristic algorithms; IP networks; Measurement; Partitioning algorithms; Shape; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
System on Chip (SoC), 2010 International Symposium on
Conference_Location
Tampere
Print_ISBN
978-1-4244-8279-5
Type
conf
DOI
10.1109/ISSOC.2010.5625542
Filename
5625542
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