DocumentCode :
2909274
Title :
MCDA-based methodology for efficient 3D-design space exploration and decision
Author :
Doan, N.A.V. ; Robert, F. ; De Smet, Y. ; Milojevic, D.
Author_Institution :
BEAMS - Fac. des Sci. Appl., Univ. Libre de Bruxelles, Brussels, Belgium
fYear :
2010
fDate :
29-30 Sept. 2010
Firstpage :
76
Lastpage :
83
Abstract :
Recently, the academic and industrial communities have proposed new technologies in order to overcome the physical limitations of the silicon, and among them 3D-Stacked Integrated Circuits (3D-SIC). Manufacturing of 3D-SICs consists in piling up conventional CMOS ICs and creating vertical interconnections between them. This offers new perspectives and levels of performance but the question of efficiently designing them arises since the solution space increases significantly. This paper presents a first approach based on a multi-criteria method in order to be able to efficiently design 3D-SIC. The aim of this work is to quickly explore the design space while considering the numerous criteria involved. This work is a first approach that shows a new design method based on the use of Multi- Criteria Decision Aid (MCDA) tools for efficient 3D-SIC design. The problem considered in this first approach is a global 3D-floorplanning. This work has shown that using MCDA tools can provide objective information that would not be available with the current conventional design methods. Those information provides deep analyses which could answer some of the questions a designer may have about the design space of a circuit. We believe that, with these promising results, this MCDA-based method will allow designers to overcome the growing complexity of designing 3D-SICs.
Keywords :
CMOS integrated circuits; elemental semiconductors; integrated circuit interconnections; integrated circuit layout; silicon; three-dimensional integrated circuits; 3D-design; 3D-floorplanning; 3D-stacked integrated circuits; CMOS integrated circuits; MCDA-based methodology; Si; academic community; industrial community; multicriteria decision aid tools; silicon; space decision; space exploration; vertical interconnections; Bandwidth; Design methodology; Integrated circuit interconnections; Optimization; Program processors; Space exploration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System on Chip (SoC), 2010 International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4244-8279-5
Type :
conf
DOI :
10.1109/ISSOC.2010.5625544
Filename :
5625544
Link To Document :
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