• DocumentCode
    2909336
  • Title

    Interconnect routing of embedded FPGAs using standard VLSI routing tools

  • Author

    Coenen, Thomas ; Schleifer, Jochen ; Weiss, Oliver ; Noll, Tobias G.

  • Author_Institution
    Inst. of Electr. Eng. & Comput. Syst., RWTH Aachen Univ., Aachen, Germany
  • fYear
    2010
  • fDate
    29-30 Sept. 2010
  • Firstpage
    121
  • Lastpage
    124
  • Abstract
    Embedded Field Programmable Gate Arrays (eFPGAs) offer an attractive way to integrate configurable hardware accelerators for signal processing tasks into systems on chips. To achieve maximum efficiency it is furthermore advisable to adapt a parametrizable eFPGA architecture to a specific class of applications. Conventional mapping tools however accommodate only a single architecture resulting in the need of a portable mapping tool. In this paper we propose a method to employ standard VLSI routing tools to solve the eFPGA routing problem for parametrizable architectures.
  • Keywords
    VLSI; field programmable gate arrays; integrated circuit interconnections; network routing; system-on-chip; VLSI routing tools; configurable hardware accelerators; eFPGA; embedded FPGA; field programmable gate arrays; interconnect routing; parametrizable architectures; portable mapping tool; signal processing tasks; systems on chips; Adders; Computer architecture; Field programmable gate arrays; Layout; Resource management; Routing; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System on Chip (SoC), 2010 International Symposium on
  • Conference_Location
    Tampere
  • Print_ISBN
    978-1-4244-8279-5
  • Type

    conf

  • DOI
    10.1109/ISSOC.2010.5625549
  • Filename
    5625549