Parallel adaptive algorithm for moving target indicator and its VLSI array realization

A computationally efficient adaptive algorithm for the IBDA (innovations-based detection algorithm) is devised and realized with a systolic array so that is possesses both fast adaptation and good steady-state performance. The algorithm has superior numerical properties and computational complexity. It possesses high computing parallelism and good data locality, which are preferable in VLSI arrays. One systolic array example designed for the algorithm has an iteration time of (2N+1) and [(n²+3n)/2] processing elements, where n is the number of states