Homogeneous MPSoC as baseband signal processing engine for OFDM systems

Author

Airoldi, Roberto ; Garzia, Fabio ; Anjum, Omer ; Nurmi, Jari

Author_Institution

Dept. of Comput. Syst., Tampere Univ. of Technol., Tampere, Finland

fYear

2010

fDate

29-30 Sept. 2010

Firstpage

26

Lastpage

30

Abstract

This paper presents a homogeneous Multi-Processor System-on-Chip (MPSoC) as baseband signal processing engine for software defined radio applications. The implementation and parallelisation of a generic OFDM system is presented taking as study case the physical layer of the IEEE 802.11a standard. The MPSoC is composed of nine computational nodes connected in a mesh topology through a hierarchical network-on-chip. Each node hosts a COFFEE RISC processor as processing element. The architecture was prototyped on an ALTERA STRATIX IV FPGA working at a maximum frequency of 180 MHz.

Keywords

OFDM modulation; field programmable gate arrays; multiprocessing systems; signal processing; software radio; system-on-chip; ALTERA STRATIX IV FPGA; COFFEE RISC processor; IEEE 802.11a standard; OFDM system; baseband signal processing engine; frequency 180 MHz; homogeneous MPSoC; mesh topology; multiprocessor system-on-chip; network-on-chip; software defined radio; Baseband; Computer architecture; Field programmable gate arrays; OFDM; Physical layer; Receivers; Reduced instruction set computing;

fLanguage

English

Publisher

ieee

Conference_Titel

System on Chip (SoC), 2010 International Symposium on

Conference_Location

Tampere

Print_ISBN

978-1-4244-8279-5

Type

conf

DOI

10.1109/ISSOC.2010.5625562

Filename

5625562