High Speed Ultra Wide Band Comparator in Deep Sub-Micron CMOS

This paper presents the implementation of a high speed low power over sampled CMOS comparator for use in a reconfigurable flash analog to digital converter (ADC) as part of a direct sequence - spread spectrum (DS-SS) based ultra wide band (UWB) radio receiver. The comparator was designed using a 90 nanometre (nm) CMOS technology process. The switching speed of the comparator is 4 giga-samples per second (GSps) for a 528 megahertz (MHz) input bandwidth. The comparator operates on a 1 V power supply. The total input referred offset of the comparator at 4 GSps is 33.1 mV which is about 0.6 LSB for a 4 bit flash converter.