DocumentCode :
2909732
Title :
Device trends and implications on circuit design in advanced CMOS technologies
Author :
Diaz, C.H. ; Fung, K.H. ; Leung, Y.K. ; Wu, C.C. ; Chao, C.P. ; Chern, G.J. ; Lin, W. ; Lee, C. ; Lai, F.S. ; Chang, M.C. ; Sun, Y.C.
Author_Institution :
TSMC, Hsin-Chu, Taiwan
fYear :
2005
fDate :
18-21 Sept. 2005
Firstpage :
675
Lastpage :
679
Abstract :
To conciliate scaling-driven fundamental material limitations with industry evolution requirements, flexible CMOS technologies and tighter interaction between process development and circuit/system design are needed to efficiently realize systems on a chip (SoC). This paper discusses issues associated with power supply scaling, performance-leakage power optimization including dynamic body/well bias, gate dielectric scaling, mobility enhancement by strained-Si, SRAM process and design interactions, digital and analog device tradeoffs, and HV I/O considerations in advanced CMOS technologies.
Keywords :
CMOS integrated circuits; SRAM chips; integrated circuit design; power supply circuits; silicon; CMOS technologies; SRAM process; Si; SoC; analog device tradeoffs; circuit design; digital device tradeoffs; dynamic body/well bias; gate dielectric scaling; mobility enhancement; performance leakage; power optimization; power supply scaling; process development; systems on a chip; CMOS process; CMOS technology; Circuit synthesis; Design optimization; Dielectric devices; Dielectric materials; Electricity supply industry; Flexible printed circuits; Power supplies; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Print_ISBN :
0-7803-9023-7
Type :
conf
DOI :
10.1109/CICC.2005.1568759
Filename :
1568759
Link To Document :
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