Title :
Design of an Algorithmic State Machine Controlled, Field Programmable Gate Array Based 16-bit Microprocessor
Author :
Muslim, Shirazy Md Shorab ; Ahmad, Zahir Uddin
Author_Institution :
Inf. & Commun. Univ., Daejeon
Abstract :
A 16-bit microprocessor is designed by top-down design methodology which is controlled by an ASM (algorithm state machine) chart and fitted it into an FPGA (field programmable gate array). The verified simulation result and post route simulation result is shown in this paper. The synthesis result of the design is also described here.
Keywords :
field programmable gate arrays; logic design; microprocessor chips; algorithmic state machine design; field programmable gate array; microprocessor; word length 16 bit; Algorithm design and analysis; Automata; Clocks; Communication system control; Design methodology; Field programmable gate arrays; Hardware design languages; Logic; Microprocessors; Registers;
Conference_Titel :
Integrated Circuits, 2007. ISIC '07. International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-0797-2
Electronic_ISBN :
978-1-4244-0797-2
DOI :
10.1109/ISICIR.2007.4441891
