• DocumentCode
    2910085
  • Title

    A 0.9V l00nW Rail-to-Rail SAR ADC for Biomedical Applications

  • Author

    Roy, Tan Kuo Hwi ; Teo, T. Hui

  • Author_Institution
    Inst. of Microelectron., Singapore
  • fYear
    2007
  • fDate
    26-28 Sept. 2007
  • Firstpage
    481
  • Lastpage
    484
  • Abstract
    This paper describes the design of a 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) designed and fabricated using 0.18 mum CMOS process. The ADC operates with a supply voltage from 0.9V to 1.4 V and up to 20 kS/s sampling rate. Using charge-scaling technique and a modified dynamic comparator structure, the ADC consumes only 100 nW at Vdd = 0.9 V and 1 kS/s sampling rate. The ADC was tested and verified for phonocardiography and heart-rate counting.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; comparators (circuits); 0.18 mum CMOS process; analog-to-digital converter; biomedical application; charge-scaling technique; heart-rate counting; modified dynamic comparator; phonocardiography; power 100 nW; rail-to-rail SAR ADC design; size 0.18 mum; successive approximation register; voltage 0.9 V; word length 12 bit; Analog-digital conversion; CMOS process; Capacitance; Capacitors; Circuits; Energy consumption; Latches; Microelectronics; Sampling methods; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuits, 2007. ISIC '07. International Symposium on
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-0797-2
  • Electronic_ISBN
    978-1-4244-0797-2
  • Type

    conf

  • DOI
    10.1109/ISICIR.2007.4441903
  • Filename
    4441903
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2910085