Optoelectronic Measurement Interface for System-on-Chip Debug

This paper details some of the problems in current debug support trace interfaces for Systems-on-Chip (SoC) and the expected bandwidth deficiency to come when further integration enables multiple processor cores and active peripherals. A solution is proposed in the form of an opto-electronic interface integrated at the SoC substrate level to provide a high bandwidth, high electromagnetic immunity link between the SoC and a recieving station.