• DocumentCode
    2910726
  • Title

    Fast logic synthesis based upon ternary universal logic module Uf

  • Author

    Fei, Benchu ; Zhuang, Nan

  • Author_Institution
    Dept. of Math., Ningbo Univ., Zhejiang, China
  • fYear
    1992
  • fDate
    27-29 May 1992
  • Firstpage
    401
  • Lastpage
    407
  • Abstract
    A fast algorithm for logic synthesis based on Uf (a ternary Reed-Muller universal logic module) is presented. Using this algorithm, the optimum or suboptimum synthesis scheme for n-variable logic functions can be located using pseudoexhaustive search of time (n+2)(n-1)/2
  • Keywords
    computational complexity; logic design; ternary logic; Reed-Muller; fast algorithm; logic synthesis; pseudoexhaustive search; ternary universal logic module; Circuits; Cost function; Explosions; Multivalued logic; Network synthesis; Optimal control; Tree data structures;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 1992. Proceedings., Twenty-Second International Symposium on
  • Conference_Location
    Sendai
  • Print_ISBN
    0-8186-2680-1
  • Type

    conf

  • DOI
    10.1109/ISMVL.1992.186823
  • Filename
    186823
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2910726